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? semiconductor components industries, llc, 2000 august, 2000 rev. 4 1 publication order number: mc14066b/d mc14066b quad analog switch/quad multiplexer the mc14066b consists of four independent switches capable of controlling either digital or analog signals. this quad bilateral switch is useful in signal gating, chopper, modulator, demodulator and cmos logic implementation. the mc14066b is designed to be pinforpin compatible with the mc14016b, but has much lower on resistance. input voltage swings as large as the full supply voltage can be controlled via each independent control input. ? triple diode protection on all control inputs ? supply voltage range = 3.0 vdc to 18 vdc ? linearized transfer characteristics ? low noise e 12 nv/ cycle , f 1.0 khz typical ? pinforpin replacement for cd4016, cd4016, mc14016b ? for lower r on , use the hc4066 highspeed cmos device maximum ratings (voltages referenced to v ss ) (note 2.) symbol parameter value unit v dd dc supply voltage range 0.5 to +18.0 v v in , v out input or output voltage range (dc or transient) 0.5 to v dd + 0.5 v i in input current (dc or transient) per control pin 10 ma i sw switch through current 25 ma p d power dissipation, per package (note 3.) 500 mw t a ambient temperature range 55 to +125 c t stg storage temperature range 65 to +150 c t l lead temperature (8second soldering) 260 c 2. maximum ratings are those values beyond which damage to the device may occur. 3. temperature derating: plastic ap and d/dwo packages: 7.0 mw/ c from 65 c to 125 c this device contains protection circuitry to guard against damage due to high static voltages or electric fields. however, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this highimpedance circuit. for proper operation, v in and v out should be constrained to the range v ss (v in or v out ) v dd . unused inputs must always be tied to an appropriate logic voltage level (e.g., either v ss or v dd ). unused outputs must be left open. http://onsemi.com a = assembly location wl, l = wafer lot yy, y = year ww, w = work week device package shipping ordering information mc14066bcp pdip14 2000/box mc14066bd soic14 55/rail mc14066bdr2 soic14 2500/tape & reel mc14066bdt tssop14 mc14066bf soeiaj14 96/rail see note 1. marking diagrams 1 14 pdip14 p suffix case 646 mc14066bcp awlyyww soic14 d suffix case 751a tssop14 dt suffix case 948g 1 14 14066b awlyww 14 066b alyw 1 14 soeiaj14 f suffix case 965 1 14 mc14066b alyw mc14066bfel soeiaj14 see note 1. 1. for ordering information on the eiaj version of the soic packages, please contact your local on semiconductor representative. mc14066bdtr2 tssop14 2500/tape & reel mc14066bdtel tssop14 2000/tape & reel
mc14066b http://onsemi.com 2 pin assignment 11 12 13 14 8 9 10 5 4 3 2 1 7 6 out 4 in 4 control 4 control 1 v dd in 3 out 3 in 2 out 2 out 1 in 1 v ss control 3 control 2 logic diagram and truth table (1/4 of device shown) block diagram in/out control out/in in 4 control 4 in 3 control 3 in 2 control 2 in 1 control 1 out 1 out 2 out 3 out 4 13 1 5 4 6 8 12 11 2 3 9 10 v dd = pin 14 v ss = pin 7 control switch 0=v ss off 1=v dd on logic diagram restrictions v ss v in v dd v ss v out v dd circuit schematic (1/4 of circuit shown) v dd v dd v dd v dd v dd v dd v dd v ss v ss v ss 300 w cmos input
mc14066b http://onsemi.com 3 ????????????????????????????????? ????????????????????????????????? electrical characteristics ???????? ???????? ???? ???? ?? ?? ??????? ??????? ????? ????? 55 c ??????? ??????? 25 c ????? ????? 125 c ?? ?? ???????? ???????? characteristic ???? ???? symbol ?? ?? v dd ??????? ??????? test conditions ??? ??? min ??? ??? max ?? ?? min ???? ???? typ (4.) ??? ??? max ??? ??? min ??? ??? max ?? ?? unit ????????????????????????????????? ????????????????????????????????? supply requirements (voltages referenced to v ee ) ???????? ???????? power supply voltage range ???? ???? v dd ?? ?? e ??????? ??????? ??? ??? 3.0 ??? ??? 18 ?? ?? 3.0 ???? ???? e ??? ??? 18 ??? ??? 3.0 ??? ??? 18 ?? ?? v ???????? ? ?????? ? ? ?????? ? ? ?????? ? ???????? quiescent current per package ???? ? ?? ? ? ?? ? ? ?? ? ???? i dd ?? ?? ?? ?? ?? 5.0 10 15 ??????? ? ????? ? ? ????? ? ? ????? ? ??????? control inputs: v in = v ss or v dd , switch i/o: v ss v i/o v dd , and d v switch 500 mv (5.) ??? ? ? ? ? ? ? ? ? ? ??? e e e ??? ? ? ? ? ? ? ? ? ? ??? 0.25 0.5 1.0 ?? ?? ?? ?? ?? e e e ???? ? ?? ? ? ?? ? ? ?? ? ???? 0.005 0.010 0.015 ??? ? ? ? ? ? ? ? ? ? ??? 0.25 0.5 1.0 ??? ? ? ? ? ? ? ? ? ? ??? e e e ??? ? ? ? ? ? ? ? ? ? ??? 7.5 15 30 ?? ?? ?? ?? ?? m a ???????? ? ?????? ? ? ?????? ? ???????? total supply current (dynamic plus quiescent, per package ???? ? ?? ? ? ?? ? ???? i d(av) ?? ?? ?? ?? 5.0 10 15 ??????? ? ????? ? ? ????? ? ??????? t a = 25 c only the channel component, (v in v out )/r on , is not included.) ??????????????? ? ????????????? ? ? ????????????? ? ??????????????? (0.07 m a/khz) f + i dd typical (0.20 m a/khz) f + i dd (0.36 m a/khz) f + i dd ?? ?? ?? ?? m a ????????????????????????????????? ????????????????????????????????? control inputs (voltages referenced to v ss ) ???????? ? ?????? ? ???????? lowlevel input voltage ???? ? ?? ? ???? v il ?? ?? ?? 5.0 10 15 ??????? ? ????? ? ??????? r on = per spec, i off = per spec ??? ? ? ? ??? e e e ??? ? ? ? ??? 1.5 3.0 4.0 ?? ?? ?? e e e ???? ? ?? ? ???? 2.25 4.50 6.75 ??? ? ? ? ??? 1.5 3.0 4.0 ??? ? ? ? ??? e e e ??? ? ? ? ??? 1.5 3.0 4.0 ?? ?? ?? v ???????? ? ?????? ? ? ?????? ? ???????? highlevel input voltage ???? ? ?? ? ? ?? ? ???? v ih ?? ?? ?? ?? 5.0 10 15 ??????? ? ????? ? ? ????? ? ??????? r on = per spec, i off = per spec ??? ? ? ? ? ? ? ??? 3.5 7.0 11 ??? ? ? ? ? ? ? ??? e e e ?? ?? ?? ?? 3.5 7.0 11 ???? ? ?? ? ? ?? ? ???? 2.75 5.50 8.25 ??? ? ? ? ? ? ? ??? e e e ??? ? ? ? ? ? ? ??? 3.5 7.0 11 ??? ? ? ? ? ? ? ??? e e e ?? ?? ?? ?? v ???????? ???????? input leakage current ???? ???? i in ?? ?? 15 ??????? ??????? v in = 0 or v dd ??? ??? e ??? ??? 0.1 ?? ?? e ???? ???? 0.00001 ??? ??? 0.1 ??? ??? e ??? ??? 1.0 ?? ?? m a ???????? ???????? input capacitance ???? ???? c in ?? ?? e ??????? ??????? ??? ??? e ??? ??? e ?? ?? e ???? ???? 5.0 ??? ??? 7.5 ??? ??? e ??? ??? e ?? ?? pf ????????????????????????????????? switches in and out (voltages referenced to v ss ) ???????? ? ?????? ? ? ?????? ? ???????? recommended peakto peak voltage into or out of the switch ???? ? ?? ? ? ?? ? ???? v i/o ?? ?? ?? ?? e ??????? ? ????? ? ? ????? ? ??????? channel on or off ??? ? ? ? ? ? ? ??? 0 ??? ? ? ? ? ? ? ??? v dd ?? ?? ?? ?? 0 ???? ? ?? ? ? ?? ? ???? e ??? ? ? ? ? ? ? ??? v dd ??? ? ? ? ? ? ? ??? 0 ??? ? ? ? ? ? ? ??? v dd ?? ?? ?? ?? v pp ???????? ? ?????? ? ???????? recommended static or dynamic voltage across the switch (5.) (figure 1) ???? ? ?? ? ???? d v switch ?? ?? ?? e ??????? ? ????? ? ??????? channel on ??? ? ? ? ??? 0 ??? ? ? ? ??? 600 ?? ?? ?? 0 ???? ? ?? ? ???? e ??? ? ? ? ??? 600 ??? ? ? ? ??? 0 ??? ? ? ? ??? 300 ?? ?? ?? mv ???????? ???????? output offset voltage ???? ???? v oo ?? ?? e ??????? ??????? v in = 0 v, no load ??? ??? e ??? ??? e ?? ?? e ???? ???? 10 ??? ??? e ??? ??? e ??? ??? e ?? ?? m v ???????? ? ?????? ? ? ?????? ? ???????? on resistance ???? ? ?? ? ? ?? ? ???? r on ?? ?? ?? ?? 5.0 10 15 ??????? ? ????? ? ? ????? ? ??????? d v switch 500 mv (5.) , v in = v il or v ih (control), and v in = 0 to v dd (switch) ??? ? ? ? ? ? ? ??? e e e ??? ? ? ? ? ? ? ??? 800 400 220 ?? ?? ?? ?? e e e ???? ? ?? ? ? ?? ? ???? 250 120 80 ??? ? ? ? ? ? ? ??? 1050 500 280 ??? ? ? ? ? ? ? ??? e e e ??? ? ? ? ? ? ? ??? 1200 520 300 ?? ?? ?? ?? w ???????? ? ?????? ? ???????? d on resistance between any two channels in the same package ???? ? ?? ? ???? d r on ?? ?? ?? 5.0 10 15 ??????? ? ????? ? ??????? ??? ? ? ? ??? e e e ??? ? ? ? ??? 70 50 45 ?? ?? ?? e e e ???? ? ?? ? ???? 25 10 10 ??? ? ? ? ??? 70 50 45 ??? ? ? ? ??? e e e ??? ? ? ? ??? 135 95 65 ?? ?? ?? w ???????? ? ?????? ? ? ?????? ? ???????? offchannel leakage current (figure 6) ???? ? ?? ? ? ?? ? ???? i off ?? ?? ?? ?? 15 ??????? ? ????? ? ? ????? ? ??????? v in = v il or v ih (control) channel to channel or any one channel ??? ? ? ? ? ? ? ??? e ??? ? ? ? ? ? ? ??? 100 ?? ?? ?? ?? e ???? ? ?? ? ? ?? ? ???? 0.05 ??? ? ? ? ? ? ? ??? 100 ??? ? ? ? ? ? ? ??? e ??? ? ? ? ? ? ? ??? 1000 ?? ?? ?? ?? na ???????? ???????? capacitance, switch i/o ???? ???? c i/o ?? ?? e ??????? ??????? switch off ??? ??? e ??? ??? e ?? ?? e ???? ???? 10 ??? ??? 15 ??? ??? e ??? ??? e ?? ?? pf ???????? ? ?????? ? ???????? capacitance, feedthrough (switch off) ???? ? ?? ? ???? c i/o ?? ?? ?? e e ??????? ? ????? ? ??????? ??? ? ? ? ??? e ??? ? ? ? ??? e ?? ?? ?? e ???? ? ?? ? ???? 0.47 ??? ? ? ? ??? e ??? ? ? ? ??? e ??? ? ? ? ??? e ?? ?? ?? pf 4. data labeled atypo is not to be used for design purposes, but is intended as an indication of the ic's potential performance. 5. for voltage drops across the switch ( d v switch ) > 600 mv ( > 300 mv at high temperature), excessive v dd current may be drawn; i.e. the current out of the switch may contain both v dd and switch input components. the reliability of the device will be unaffected unless the maximum ratings are exceeded. (see first page of this data sheet.)
mc14066b http://onsemi.com 4 ????????????????????????????????? ????????????????????????????????? electrical characteristics (6.) (c l = 50 pf, t a = 25 c unless otherwise noted.) ???????????????? ???????????????? characteristic ???? ???? symbol ???? ???? v dd vdc ???? ???? min ???? ???? typ (7.) ???? ???? max ??? ??? unit ???????????????? ? ?????????????? ? ? ?????????????? ? ? ?????????????? ? ???????????????? propagation delay times v ss = 0 vdc input to output (r l = 10 k w ) t plh , t phl = (0.17 ns/pf) c l + 15.5 ns t plh , t phl = (0.08 ns/pf) c l + 6.0 ns t plh , t phl = (0.06 ns/pf) c l + 4.0 ns ???? ? ?? ? ? ?? ? ? ?? ? ???? t plh , t phl ???? ? ?? ? ? ?? ? ? ?? ? ???? 5.0 10 15 ???? ? ?? ? ? ?? ? ? ?? ? ???? e e e ???? ? ?? ? ? ?? ? ? ?? ? ???? 20 10 7.0 ???? ? ?? ? ? ?? ? ? ?? ? ???? 40 20 15 ??? ? ? ? ? ? ? ? ? ? ??? ns ???????????????? ? ?????????????? ? ? ?????????????? ? ???????????????? control to output (r l = 1 k w ) (figure 2) output a1o to high impedance ???? ? ?? ? ? ?? ? ???? t phz ???? ? ?? ? ? ?? ? ???? 5.0 10 15 ???? ? ?? ? ? ?? ? ???? e e e ???? ? ?? ? ? ?? ? ???? 40 35 30 ???? ? ?? ? ? ?? ? ???? 80 70 60 ??? ? ? ? ? ? ? ??? ns ???????????????? ? ?????????????? ? ???????????????? output a0o to high impedance ???? ? ?? ? ???? t plz ???? ? ?? ? ???? 5.0 10 15 ???? ? ?? ? ???? e e e ???? ? ?? ? ???? 40 35 30 ???? ? ?? ? ???? 80 70 60 ??? ? ? ? ??? ns ???????????????? ? ?????????????? ? ? ?????????????? ? ???????????????? high impedance to output a1o ???? ? ?? ? ? ?? ? ???? t pzh ???? ? ?? ? ? ?? ? ???? 5.0 10 15 ???? ? ?? ? ? ?? ? ???? e e e ???? ? ?? ? ? ?? ? ???? 60 20 15 ???? ? ?? ? ? ?? ? ???? 120 40 30 ??? ? ? ? ? ? ? ??? ns ???????????????? ? ?????????????? ? ???????????????? high impedance to output a0o ???? ? ?? ? ???? t pzl ???? ? ?? ? ???? 5.0 10 15 ???? ? ?? ? ???? e e e ???? ? ?? ? ???? 60 20 15 ???? ? ?? ? ???? 120 40 30 ??? ? ? ? ??? ns ???????????????? ? ?????????????? ? ???????????????? second harmonic distortion v ss = 5 vdc (v in = 1.77 vdc, rms centered @ 0.0 vdc, r l = 10 k w , f = 1.0 khz) ???? ? ?? ? ???? e ???? ? ?? ? ???? 5.0 ???? ? ?? ? ???? e ???? ? ?? ? ???? 0.1 ???? ? ?? ? ???? e ??? ? ? ? ??? % ???????????????? ? ?????????????? ? ? ?????????????? ? ???????????????? bandwidth (switch on) (figure 3) v ss = 5 vdc (r l = 1 k w , 20 log (v out /v in ) = 3 db, c l = 50 pf, v in = 5 v pp ) ???? ? ?? ? ? ?? ? ???? e ???? ? ?? ? ? ?? ? ???? 5.0 ???? ? ?? ? ? ?? ? ???? e ???? ? ?? ? ? ?? ? ???? 65 ???? ? ?? ? ? ?? ? ???? e ??? ? ? ? ? ? ? ??? mhz ???????????????? ???????????????? feedthrough attenuation (switch off) v ss = 5 vdc (v in = 5 v pp , r l = 1 k w , f in = 1.0 mhz) (figure 3) ???? ???? e ???? ???? 5.0 ???? ???? e ???? ???? 50 ???? ???? e ??? ??? db ???????????????? ? ?????????????? ? ? ?????????????? ? ???????????????? channel separation (figure 4) v ss = 5 vdc (v in = 5 v pp , r l = 1 k w , f in = 8.0 mhz) (switch a on, switch b off) ???? ? ?? ? ? ?? ? ???? e ???? ? ?? ? ? ?? ? ???? 5.0 ???? ? ?? ? ? ?? ? ???? e ???? ? ?? ? ? ?? ? ???? 50 ???? ? ?? ? ? ?? ? ???? e ??? ? ? ? ? ? ? ??? db ???????????????? ? ?????????????? ? ???????????????? crosstalk, control input to signal output (figure 5) v ss = 5 vdc (r 1 = 1 k w , r l = 10 k w , control t tlh = t thl = 20 ns) ???? ? ?? ? ???? e ???? ? ?? ? ???? 5.0 ???? ? ?? ? ???? e ???? ? ?? ? ???? 300 ???? ? ?? ? ???? e ??? ? ? ? ??? mv pp 6. the formulas given are for the typical characteristics only at 25 c. 7. data labelled atypo is not to be used for design purposes but is intended as an indication of the ic's potential performance.
mc14066b http://onsemi.com 5 test circuits figure 1. d v across switch figure 2. turnon delay time test circuit and waveforms figure 3. bandwidth and feedthrough attenuation figure 4. channel separation figure 5. crosstalk, control to output figure 6. off channel leakage control section of ic source v load on switch v out v out v c v c v out v in r l c l 20 ns v dd v ss 90% 50% 10% t pzh t phz t pzl t plz 10% 90% 10% v x v out c l r l v dd v ss v c v in v dd - v ss 2 v dd - v ss 2 v in v dd v ss r l c l r l c l v in 1 k v out r l c l = 50 pf v c = -5.0 v to +5.0 v swing v c = v dd for bandwidth test v c = v ss for feedthrough test off channel under test v dd v ss v ss v dd a control section of ic 90% v in = v dd v x = v ss v in = v ss v x = v dd 10 k
mc14066b http://onsemi.com 6 figure 7. channel resistance (r on ) test circuit v dd v ss 10 k v dd keithley 160 digital multimeter 1 k w range x-y plotter typical resistance characteristics figure 8. v dd = 7.5 v, v ss = 7.5 v figure 9. v dd = 5.0 v, v ss = 5.0 v r on , on" resistance (ohms) 350 300 250 200 150 100 0 50 -8.0 -10 -6.0 -4.0 -2.0 0 0.2 4.0 6.0 8.0 10 v in , input voltage (volts) t a = 125 c 25 c -55 c r on , on" resistance (ohms) 350 300 250 200 150 100 0 50 -8.0 -10 -6.0 -4.0 -2.0 0 0.2 4.0 6.0 8.0 10 v in , input voltage (volts) t a = 125 c 25 c -55 c figure 10. v dd = 2.5 v, v ss = 2.5 v r on , on" resistance (ohms) 700 600 500 400 300 200 0 100 -8.0 -10 -6.0 -4.0 -2.0 0 0.2 4.0 6.0 8.0 10 v in , input voltage (volts) t a = 125 c 25 c -55 c figure 11. comparison at 25 c, v dd = v ss r on , on" resistance (ohms) 350 300 250 200 150 100 0 50 -8.0 -10 -6.0 -4.0 -2.0 0 0.2 4.0 6.0 8.0 10 v in , input voltage (volts) t a = 25 c v dd = 2.5 v 5.0 v 7.5 v
mc14066b http://onsemi.com 7 applications information figure a illustrates use of the analog switch. the 0 to5 volt digital control signal is used to directly control a 5 volt peaktopeak analog signal. the digital control logic levels are determined by v dd and v ss . the v dd voltage is the logic high voltage, the v ss voltage is logic low. for the example, v dd = + 5 v = logic high at the control inputs; v ss = gnd = 0 v = logic low. the maximum analog signal level is determined by v dd and v ss . the analog voltage must not swing higher than v dd or lower than v ss . the example shows a 5 volt peaktopeak signal which allows no margin at either peak. if voltage transients above v dd and/or below v ss are anticipated on the analog channels, external diodes (d x ) are recommended as shown in figure b. these diodes should be small signal types able to absorb the maximum anticipated current surges during clipping. the absolute maximum potential difference between v dd and v ss is 18.0 volts. most parameters are specified up to 15 volts which is the recommended maximum difference between v dd and v ss . figure a. application example +5 v v dd v ss 5 v p-p analog signal 0-to-5 v digital control signals switch in mc14066b switch out 5 v p-p analog signal +5.0 v + 2.5 v gnd +5 v external cmos digital circuitry figure b. external germanium or schottky clipping diodes v dd v dd v ss v ss d x d x d x d x switch in switch out
mc14066b http://onsemi.com 8 package dimensions p suffix plastic dip package case 64606 issue m 17 14 8 b a dim min max min max millimeters inches a 0.715 0.770 18.16 18.80 b 0.240 0.260 6.10 6.60 c 0.145 0.185 3.69 4.69 d 0.015 0.021 0.38 0.53 f 0.040 0.070 1.02 1.78 g 0.100 bsc 2.54 bsc h 0.052 0.095 1.32 2.41 j 0.008 0.015 0.20 0.38 k 0.115 0.135 2.92 3.43 l m --- 10 --- 10 n 0.015 0.039 0.38 1.01 notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: inch. 3. dimension l to center of leads when formed parallel. 4. dimension b does not include mold flash. 5. rounded corners optional. f hg d k c seating plane n t 14 pl m 0.13 (0.005) l m j 0.290 0.310 7.37 7.87
mc14066b http://onsemi.com 9 package dimensions d suffix plastic soic package case 751a03 issue f notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimensions a and b do not include mold protrusion. 4. maximum mold protrusion 0.15 (0.006) per side. 5. dimension d does not include dambar protrusion. allowable dambar protrusion shall be 0.127 (0.005) total in excess of the d dimension at maximum material condition. a b g p 7 pl 14 8 7 1 m 0.25 (0.010) b m s b m 0.25 (0.010) a s t t f r x 45 seating plane d 14 pl k c j m dim min max min max inches millimeters a 8.55 8.75 0.337 0.344 b 3.80 4.00 0.150 0.157 c 1.35 1.75 0.054 0.068 d 0.35 0.49 0.014 0.019 f 0.40 1.25 0.016 0.049 g 1.27 bsc 0.050 bsc j 0.19 0.25 0.008 0.009 k 0.10 0.25 0.004 0.009 m 0 7 0 7 p 5.80 6.20 0.228 0.244 r 0.25 0.50 0.010 0.019
mc14066b http://onsemi.com 10 package dimensions dt suffix plastic tssop package case 948g01 issue o dim min max min max inches millimeters a 4.90 5.10 0.193 0.200 b 4.30 4.50 0.169 0.177 c --- 1.20 --- 0.047 d 0.05 0.15 0.002 0.006 f 0.50 0.75 0.020 0.030 g 0.65 bsc 0.026 bsc h 0.50 0.60 0.020 0.024 j 0.09 0.20 0.004 0.008 j1 0.09 0.16 0.004 0.006 k 0.19 0.30 0.007 0.012 k1 0.19 0.25 0.007 0.010 l 6.40 bsc 0.252 bsc m 0 8 0 8 notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimension a does not include mold flash, protrusions or gate burrs. mold flash or gate burrs shall not exceed 0.15 (0.006) per side. 4. dimension b does not include interlead flash or protrusion. interlead flash or protrusion shall not exceed 0.25 (0.010) per side. 5. dimension k does not include dambar protrusion. allowable dambar protrusion shall be 0.08 (0.003) total in excess of the k dimension at maximum material condition. 6. terminal numbers are shown for reference only. 7. dimension a and b are to be determined at datum plane -w-. s u 0.15 (0.006) t 2x l/2 s u m 0.10 (0.004) v s t l u seating plane 0.10 (0.004) t ??? ??? section nn detail e j j1 k k1 detail e f m w 0.25 (0.010) 8 14 7 1 pin 1 ident. h g a d c b s u 0.15 (0.006) t v 14x ref k n n
mc14066b http://onsemi.com 11 package dimensions f suffix plastic eiaj soic package case 96501 issue o h e a 1 dim min max min max inches --- 2.05 --- 0.081 millimeters 0.05 0.20 0.002 0.008 0.35 0.50 0.014 0.020 0.18 0.27 0.007 0.011 9.90 10.50 0.390 0.413 5.10 5.45 0.201 0.215 1.27 bsc 0.050 bsc 7.40 8.20 0.291 0.323 0.50 0.85 0.020 0.033 1.10 1.50 0.043 0.059 0 0.70 0.90 0.028 0.035 --- 1.42 --- 0.056 a 1 h e q 1 l e 10 0 10 l e q 1 notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimensions d and e do not include mold flash or protrusions and are measured at the parting line. mold flash or protrusions shall not exceed 0.15 (0.006) per side. 4. terminal numbers are shown for reference only. 5. the lead width dimension (b) does not include dambar protrusion. allowable dambar protrusion shall be 0.08 (0.003) total in excess of the lead width dimension at maximum material condition. dambar cannot be located on the lower radius or the foot. minimum space between protrusions and adjacent lead to be 0.46 ( 0.018). 0.13 (0.005) m 0.10 (0.004) d z e 1 14 8 7 e a b view p c l detail p m a b c d e e 0.50 m z
mc14066b http://onsemi.com 12 on semiconductor and are trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to make changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. atypicalo parameters which may be provided in scill c data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. all operating parameters, including atypicalso must be validated for each customer application by customer's technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body , or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthori zed use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. publication ordering information central/south america: spanish phone : 3033087143 (monfri 8:00am to 5:00pm mst) email : onlitspanish@hibbertco.com asia/pacific : ldc for on semiconductor asia support phone : 3036752121 (tuefri 9:00am to 1:00pm, hong kong time) toll free from hong kong & singapore: 00180044223781 email : onlitasia@hibbertco.com japan : on semiconductor, japan customer focus center 4321 nishigotanda, shinagawaku, tokyo, japan 1410031 phone : 81357402745 email : r14525@onsemi.com on semiconductor website : http://onsemi.com for additional information, please contact your local sales representative. mc14066b/d north america literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 3036752175 or 8003443860 toll free usa/canada fax : 3036752176 or 8003443867 toll free usa/canada email : onlit@hibbertco.com fax response line: 3036752167 or 8003443810 toll free usa/canada n. american technical support : 8002829855 toll free usa/canada europe: ldc for on semiconductor european support german phone : (+1) 3033087140 (monfri 2:30pm to 7:00pm cet) email : onlitgerman@hibbertco.com french phone : (+1) 3033087141 (monfri 2:00pm to 7:00pm cet) email : onlitfrench@hibbertco.com english phone : (+1) 3033087142 (monfri 12:00pm to 5:00pm gmt) email : onlit@hibbertco.com european tollfree access*: 0080044223781 *available from germany, france, italy, uk

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